The present invention relates to CAM (Content Addressable Memory).
Heretofore, fully parallel CAMs (Content Addressable Memories, which are also called associative memories), have been widely known as semiconductor integrated circuits having the functions of performing the match detection of retrieval data and stored data concurrently in terms of all bits and outputting the match address of stored data (see "Design of CMOS VLSI," pp 176-177, edited by Tetsuya Iizuka and supervised by Takuo Sugano, Baifukan, 1989).
However, the bitwise configuration of a typical conventional CAM comprising SRAM cells and exclusive NOR circuits has made it impossible to provide CAM having a large-sized cell and consequently a capacity at a level fit for practical use.
In many IC cards that have recently been commercialized as personal data bases, for instance, no CAM has been arranged as stated above. In such an IC card, an arrangement has been made to find out data for the intended purpose by sequentially retrieving data one after another from ROM (Read Only Memory) in which the data are prestored. For this reason, the greater the number of data becomes, as in language dictionaries such as Japanese and English-Japanese dictionaries, the more it requires time to retrieve data. In other words, what has high-speed, flexible retrieval functions is still nonexistent.
If all data are made retrievable at a time as in the case of CAM, not by retrieving data one by one with the aid of software from the conventional ROM and the like in the prior art as stated above, data retrieval from the IC card equipped with a large memory capacity may be implemented with flexibility at high speed.